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Embedded-Systems-Bare-Metal-Programming-Ground-Up
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Grade
Name
Complexity
Churn
Issues
A
UART_TX\STM32F4xx\CMSIS\Device\Source\system_stm32f4xx.c
19 1 2
A
BSRR\STM32F4xx\CMSIS\Device\Source\system_stm32f4xx.c
19 1 2
A
ADC\STM32F4xx\CMSIS\Device\Source\system_stm32f4xx.c
19 1 2
A
GP Timer\STM32F4xx\CMSIS\Device\Source\system_stm32f4xx.c
19 1 2
B
UART_TX_RX\main.c
16 8 2
A
gpio input\CMSIS_5\CMSIS\Core\Include\pmu_armv8.h
14 1 -
A
Bilnky Segger\CMSIS_5\CMSIS\Core\Include\pmu_armv8.h
14 1 -
A
UART_TX_RX\CMSIS_5\CMSIS\Core\Include\pmu_armv8.h
14 1 -
A
UART_TX\CMSIS_5\CMSIS\Core\Include\pmu_armv8.h
14 1 -
A
UART_TX_RX\main_old.c
14 3 2
A
BSRR\CMSIS_5\CMSIS\Core\Include\pmu_armv8.h
14 1 -
A
systick delay\CMSIS_5\CMSIS\Core\Include\pmu_armv8.h
14 1 -
A
GP Timer\CMSIS_5\CMSIS\Core\Include\pmu_armv8.h
14 1 -
A
ADC\CMSIS_5\CMSIS\Core\Include\pmu_armv8.h
14 1 -
A
Bilnky Segger\CMSIS_5\CMSIS\Core\Include\mpu_armv7.h
9 1 -
A
UART_TX\CMSIS_5\CMSIS\Core\Include\mpu_armv7.h
9 1 -
A
gpio input\CMSIS_5\CMSIS\Core\Include\mpu_armv7.h
9 1 -
A
UART_TX\main.c
9 1 -
A
UART_TX_RX\CMSIS_5\CMSIS\Core\Include\mpu_armv7.h
9 1 -
A
BSRR\CMSIS_5\CMSIS\Core\Include\mpu_armv7.h
9 1 -